Regviz

Silicon Labs /EFR32FG23B020F512IM40 /RAC_S /IFADCPLLREG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as IFADCPLLREG

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32FG23B010F512IM40/RAC_NS/IFADCPLLREG#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (disable)IFADCPLLSERIEREGFILTER 0 (v1p393)IFADCPLLSERIEREGVCTRL 0 (cur15uA)IFADCPLLSHUNTREGICTRL 0 (v0p987)IFADCPLLSHUNTREGVCTRL

IFADCPLLSERIEREGVCTRL=v1p393, IFADCPLLSHUNTREGICTRL=cur15uA, IFADCPLLSERIEREGFILTER=disable, IFADCPLLSHUNTREGVCTRL=v0p987

Description

No Description

Fields

IFADCPLLSERIEREGFILTER

IFADCPLLSERIEREGFILTER

0 (disable): undefined

1 (enable): undefined
IFADCPLLSERIEREGVCTRL

IFADCPLLSERIEREGVCTRL

0 (v1p393): undefined

1 (v1p370): undefined

2 (v1p346): undefined

3 (v1p322): undefined

4 (v1p298): undefined

5 (v1p274): undefined

6 (v1p249): undefined

7 (v1p225): undefined
IFADCPLLSHUNTREGICTRL

IFADCPLLSHUNTREGICTRL

0 (cur15uA): undefined

1 (cur20uA): undefined

2 (cur25uA): undefined

3 (cur30uA): undefined

4 (cur35uA): undefined

5 (cur40uA): undefined

6 (cur45uA): undefined

7 (cur50uA): undefined
IFADCPLLSHUNTREGVCTRL

IFADCPLLSHUNTREGVCTRL

0 (v0p987): undefined

1 (v1p027): undefined

2 (v1p108): undefined

3 (v1p148): undefined

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data